1. Technical Field
The present invention relates to high-density memory design and, in particular, to testing high-density memory cells with shared contacts. Still more particularly, the present invention provides a method and apparatus for characterizing shared contacts in high-density memory cell design.
2. Description of the Related Art
In the computer and electronics industry, there is a constant desire to make circuits, particularly integrated circuits, faster and smaller. Making circuits smaller allows many more components to be packed into a chip, increasing functionality and performance. This is particularly true with memory circuits. Increasing the density of components in a memory chip allows for many more memory cells to be fabricated in a memory chip, thus increasing the amount of memory on chip.
However, higher-density circuits pose several problems. In an integrated circuit, components are formed using channels of highly doped silicon, channels of polysilicon, and layers of insulation. Recently, the channel lengths have decreased from 400 nanometers (nm) to as small as 90 nm and will likely decrease even further. These small channel lengths allow components, particularly transistors, to be tightly packed. However, with these small channel lengths transistors and other components become more difficult to fabricate without defects.
An application specific integrated circuit (ASIC) is a small circuit that may be programmed with customer logic. As the complexity of the customer logic increases, the amount of memory needed also increases. A system on chip (SoC) is an entire system on a single chip. For example, a controller for a digital video disk (DVD) writer may be encompassed on a single chip. The amount of memory, such as static random access memory (SRAM) in a SoC or ASIC device has become larger and larger. However, the memory core takes up real estate on the chip that may be used for application specific logic. Therefore, it has become advantageous to build a very small production memory core cell.
In order to achieve a smaller memory core cell, it has become general practice to adapt shared contact in a high-density SRAM core cell design. A shared contact is a special contact, which connects both silicon island layer and poly layer. If two separate contacts were used to connect poly and silicon instead of one shared contact, the consideration to meet the minimum spacing of contacts and metal 1 would give rise to a larger core cell. Using shared contact indeed saves the space to render a smaller core cell.
The area that the shared contact consumes is usually larger than one regular square contact and its shape may vary depending upon the core cell design. Just as the regular square contact needs to be characterized to ensure the connection between silicon and metal, one must also make sure that the shared contact has proper connection between the metal to both the silicon island and the poly silicon.